Central Processing Unit

The central processing unit (CPU) is the part of the computer that performs the bulk of data processing operations. It is composed of three major components:

1. Register Set: Stores intermediate data used during the execution of instructions.
2. Arithmetic Logic Unit (ALU): Performs the required micro-operations for executing the instructions.
3. Control Unit: Supervises the transfer of information among the registers and instructs the ALU on which operation to perform.

CPU Functions and Architecture

The CPU executes a variety of functions dictated by the types of instructions incorporated in the computer's architecture. Computer architecture is defined as the structure and behavior of the computer as perceived by a programmer using machine language instructions. This includes:

• Instruction formats
• Addressing modes
• Instruction set
• Organization of CPU registers

Instruction Set

The instruction set of a CPU provides the specifications for the design and operation of the CPU. It defines how machine instructions are implemented in hardware. The user programming the computer in machine or assembly language must understand:

• The register set
• Memory structure
• Data types supported by the instructions
• Functions performed by each instruction

General Register Organization

In programming, memory locations are often used to store pointers, counters, return addresses, temporary results, and partial products during multiplication. Accessing these memory locations is time-consuming. It is more efficient to store intermediate values in processor registers. When a large number of registers are included in the CPU, connecting them through a common bus system is most efficient.

Bus System

A bus organization for CPU registers facilitates direct data transfers and various micro-operations. Consider a bus system for seven CPU registers:

1. Multiplexers (MUX): The output of each register is connected to two multiplexers to form buses A and B. Selection lines in each multiplexer select one register or input data for the particular bus.
2. ALU: The ALU performs arithmetic or logic micro-operations. The result is available for output data and is also fed back into the input of all registers.
3. Decoder: Selects the register that receives the information from the output bus.

Example Micro-Operation

To perform the operation $R1 \leftarrow R2 + R3$:

1. MUX A selector (SELA): Places the content of $R2$ into bus A.
2. MUX B selector (SELB): Places the content of $R3$ into bus B.
3. ALU operation selector (OPR): Performs the addition $A + B$.
4. Decoder destination selector (SELD): Transfers the content of the output bus into $R1$.

The control unit generates these selection variables at the beginning of a clock cycle. Data from the source registers propagate through the multiplexers and ALU to the output bus and into the destination register during the clock cycle interval. At the next clock transition, the data is transferred into $R1$.

Control Word

A 14-bit control word specifies a micro-operation in the CPU. It consists of four fields:

• SELA: Selects the source register for the ALU's A input.
• SELB: Selects the source register for the ALU's B input.
• SELD: Selects the destination register using the decoder.
• OPR: Specifies the ALU operation.

For example, the subtract micro-operation $R1 \leftarrow R2 - R3$ is specified by the control word 010 011 001 00101, derived as follows:

• SELA (R2): 010
• SELB (R3): 011
• SELD (R1): 001
• OPR (SUB): 00101

Register and ALU Operation Encoding

Register Selection Fields

ALU Operations Encoding

Examples of Micro-Operations

Examples of control words for various micro-operations:

Microprogrammed Control

The most efficient way to generate control words with a large number of bits is to store them in a memory unit, referred to as control memory. By reading consecutive control words from memory, a desired sequence of micro-operations can be initiated for the CPU. This type of control is known as microprogrammed control.