Computer Registers

In a basic computer, instructions are stored sequentially in memory locations and are executed one at a time. The control unit reads an instruction from a specific memory address, executes it, and then moves to the next instruction in sequence. This process requires a counter to calculate the address of the next instruction. Additionally, a register in the control unit is needed to store the instruction code after it is read from memory. Processor registers are also necessary for data manipulation and for holding memory addresses. The configuration of these registers is fundamental to the computer's operation.

Register Configuration

The basic computer has several key registers, each serving a specific function:

Memory Organization

The memory unit in the basic computer has a capacity of 4096 words, with each word containing 16 bits. Instructions are 16 bits in length, with 12 bits used for the address of an operand, 3 bits for the operation code, and 1 bit for specifying direct or indirect addressing.

Program Counter (PC)

The PC is a 12-bit register that holds the address of the next instruction to be executed. After executing an instruction, the PC is incremented to point to the next instruction in sequence. If a branch instruction is encountered, the address part of the branch instruction is transferred to the PC, allowing the program to continue execution from a non-consecutive memory location.

Common Bus System

The basic computer uses a common bus system to transfer information between registers and memory. This system reduces the number of connections required between registers. The bus system consists of 16 lines, connecting the outputs of several registers and memory to the inputs of other registers and memory.

Bus Selection

The bus selection is controlled by selection variables $S_2$, $S_1$, and $S_0$. For example, the data register (DR) outputs its 16-bit contents to the bus when $S_2S_1S_0 = 011$. The destination register's load (LD) input is enabled to receive data from the bus.

Memory Access

Memory read and write operations are performed through the common bus. The memory address is provided by the AR, while the data is transferred via the bus. For a read operation, the memory places its 16-bit output onto the bus when $S_2S_1S_0 = 111$. For a write operation, the memory receives the contents of the bus.

Register Control

Registers are controlled by three primary inputs: LD (load), INR (increment), and CLR (clear). These inputs allow the registers to function as binary counters with parallel load and synchronous clear capabilities. The increment operation is achieved by enabling the count input of the counter.

Arithmetic and Logic Operations

The AC register receives inputs from an adder and logic circuit, which has three sets of inputs:

1. Outputs from the AC for implementing micro-operations like complement and shift.
2. Outputs from the DR for arithmetic and logic operations such as addition and logical AND.
3. Outputs from the INPR for input operations.

The result of an addition operation is transferred to the AC, and the end carry-out is stored in a flip-flop (E).

Example Micro-operations

Consider the micro-operations:

These can be executed simultaneously by placing the content of the AC on the bus (with $S_2S_1S_0 = 100$), enabling the LD input of the DR, transferring the content of the DR through the adder and logic circuit into the AC, and enabling the LD input of the AC. Both transfers occur at the clock pulse transition at the end of the clock cycle.