Design of Control Unit

The control unit orchestrates the execution of microinstructions by dividing them into fields, each field defining distinct functions. These fields include control bits for initiating microoperations, special bits for determining the next address, and an address field for branching. The number of control bits can be minimized by grouping mutually exclusive variables into encoded fields, reducing the microinstruction size but necessitating additional hardware and potentially increasing signal propagation delay due to decoding circuits.

Encoding of Control Bits

Microinstructions typically have their bits divided into fields. For example, a nine-bit microoperation field can be split into three subfields of three bits each. Each subfield is decoded to generate distinct microoperations. The decoders' outputs are connected to the appropriate processor unit inputs.

Example

Suppose the three fields in the microinstruction output are decoded using 3x8 decoders. Each field, producing eight possible outputs, connects to circuits that initiate corresponding microoperations. For instance, if field F1 = 101 (binary 5), the data in the Data Register (DR) is transferred to the Address Register (AR) upon the next clock pulse. Similarly, F1 = 110 (binary 6) initiates a transfer from the Program Counter (PC) to AR. The multiplexer directs the data from either DR or PC to AR based on the active decoder output.

Connection

Decoder outputs linked to register transfers must be connected accordingly. For example, outputs 5 and 6 of decoder F1 connect to AR's load input. Thus, when either output is active, data from the multiplexer is transferred to AR with a clock pulse transition.

Arithmetic Logic Shift Unit

The design of the Arithmetic Logic Shift Unit (ALSU) replaces the gate-generated control signals (e.g., AND, ADD, DR) with outputs from decoders. Each decoder output corresponding to an AC operation is connected to the ALSU inputs.

Microprogram Sequencer

The control unit's core components are the control memory and the microprogram sequencer, which selects the next address. The sequencer is essential for fetching and executing microinstructions, determining the specific address source for the Control Address Register (CAR).

Structure

A typical microprogram sequencer includes:

• Control Memory: Stores microinstructions.
• Multiplexers: Route addresses from multiple sources.
• CAR: Holds the current address for control memory.
• Subroutine Register (SBR): Temporarily stores addresses for subroutine calls.
• Internal Stack: Manages multiple active subroutines.

Functionality

The sequencer's address selection is based on the next-address bits from the current microinstruction. A multiplexer directs one of four address sources into CAR:

1. Incremented value of CAR.
2. Address field from the current microinstruction.
3. Output from SBR.
4. External source mapping the instruction.

A second multiplexer tests a status bit, with the result influencing the input logic circuit.

Input Logic Circuit

The circuit, receiving inputs$\:( I_0, I_1,$) and$\:T$, produces outputs$\:( S_0, S_1,$) and$(\: L$), controlling the address source selection and SBR loading. The binary values of$\:( S_1$) and$\:( S_0$) determine the multiplexer path. For example,$\:( S_1 S_0 = 10$) selects the path from SBR to CAR.

Example

For a call microinstruction $(BR = 01)$, SBR loads the incremented CAR value if the status bit condition$\:( T = 1$) is satisfied. The input logic truth table simplifies to:

The simplified Boolean functions derived from the table are:

$S_1 = I_1$ $S_0 = I_0 \bar T + I_1 T$ $L = I_1 \bar T$

Implementation

The logic circuit can be built using three AND gates, an OR gate, and an inverter. The incrementer within the sequencer is a combinational circuit, constructed with cascading half-adders to perform the increment-by-one operation.

Conclusion

The microprogram sequencer, with its multiplexers, registers, and input logic, facilitates a flexible and efficient control unit design. Properly connecting decoder outputs to the processor unit and designing the input logic ensure precise execution of microinstructions.